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| general description the max1645b is a high-efficiency battery charger capable of charging batteries of any chemistry type. it uses the intel system management bus (smbus ? ) to control voltage and current-charge outputs. when charging lithium-ion (li+) batteries, the max1645b automatically transitions from regulating current to regu- lating voltage. the max1645b can also limit line input current so as not to exceed a predetermined current drawn from the dc source. a 175s charge safety timer prevents ?unaway charging?should the max1645b stop receiving charging voltage/current commands. the max1645b employs a next-generation synchro- nous buck control circuitry that lowers the minimum input-to-output voltage drop by allowing the duty cycle to exceed 99%. the max1645b can easily charge one to four series li+ cells. applications notebook computers point-of-sale terminals personal digital assistants features input current limiting 175s charge safety timeout 128ma wake-up charge charges any chemistry battery: li+, nicd, nimh, lead acid, etc. intel smbus 2-wire serial interface compliant with level 2 smart battery charger spec rev 1.0 +8v to +28v input voltage range up to 18.4v battery voltage 11-bit battery voltage setting ?.8% output voltage accuracy with internal reference 3a (max) battery charge current 6-bit charge-current setting 99.99% (max) duty cycle for low-dropout operation load/source switchover drivers >97% efficiency max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 cvs pds cssp cssn bst dhi int lx dlov dlo pgnd csip csin pdl sda scl thm v dd dac batt gnd ccv cci ccs ref cls ldo dcin qsop top view max1645b part temp range pin-package MAX1645BEEI -40 c to +125 c 28 qsop 19-2593; rev 0; 10/02 typical operating circuit appears at end of data sheet. smbus is a trademark of intel corp. pin configuration ordering information for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25 c.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cvs, cssp, cssn, lx to gnd....................-0.3v to +30v cssp to cssn, csip to csin ...............................-0.3v to +0.3v pds, pdl to gnd ...................................-0.3v to (v cssp + 0.3v) bst to lx..................................................................-0.3v to +6v dhi to lx ...................................................-0.3v to (v bst + 0.3v) csip, csin, batt to gnd .....................................-0.3v to +22v ldo to gnd .....................-0.3v to (lower of 6v or v dcin + 0.3v) dlo to gnd ...........................................-0.3v to (v dlov + 0.3v) ref, dac, ccv, cci, ccs, cls to gnd ..... -0.3v to (v ldo + 0.3v) v dd , scl, sda, int, dlov to gnd.........................-0.3v to +6v thm to gnd ...............................................-0.3v to (v dd + 0.3v) pgnd to gnd .......................................................-0.3v to +0.3v ldo continuous current.....................................................50ma continuous power dissipation (t a = +70 c) 28-pin qsop (derate 10.8mw/ c above +70 c).........860mw operating temperature range ...........................-40 c to +85 c storage temperature range .............................-60 c to +150 c lead temperature (soldering, 10s) .................................+300 c parameter symbol conditions min typ max units general specifications dcin typical operating range v dcin 828v dcin supply current i dcin 8v < v dcin < 28v 1.7 6 ma dcin supply current charging inhibited 8v < v dcin < 28v 0.7 2 ma dcin rising 7.5 7.85 dcin undervoltage threshold when ac_present switches dcin falling 7 7.4 v ldo output voltage v ldo 8v < v dcin < 28v, 0 < i ldo < 15ma 5.15 5.4 5.65 v v dd input voltage range 8v < v dcin < 28v (note 1) 2.80 5.65 v v dd rising 2.55 2.8 v dd undervoltage threshold when the s m b r esp ond s to com m and s v dd falling 2.1 2.5 v v dd quiescent current i dd 0 < v dcin < 6v, v dd = 5v, v scl = 5v, v sda = 5v 80 150 a ref output voltage v ref 0 < i ref < 200a 4.066 4.096 4.126 v batt undervoltage threshold when i charge drops to 128ma (note 2) 2.4 2.8 v pds charging source switch turn-off threshold v pds-off v cvs referred to v batt , v cvs falling 50 100 150 mv pds charging source switch threshold hysteresis v pds-hys v cvs referred to v batt 100 200 300 mv pds output low voltage, pds below cssp i pds = 0 8 10 12 v pds turn-on current pds = cssp 100 150 300 a pds turn-off current v pds = v cssp - 2v, v dcin = 16v 10 50 ma pdl load switch turn-off threshold v pdl-off v cvs referred to v batt , v cvs rising -150 -100 -50 mv max1645b advanced chemistry-independent, level 2 battery charger with input current limiting _______________________________________________________________________________________ 3 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0 c to +85 c , unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units pdl load switch threshold hysteresis v pdl-hys v cvs referred to v batt 100 200 300 mv pdl turn-off current v cssn - v pdl = 1v 6 12 ma pdl turn-on resistance pdl to gnd 50 100 150 k ? cvs input bias current v cvs = 28v 6 20 a chargingvoltage() = 0x41a0 16.666 16.8 16.934 chargingvoltage() = 0x3130 12.492 12.592 12.692 chargingvoltage() = 0x20d0 8.333 8.4 8.467 batt full-charge voltage v0 chargingvoltage() = 0x1060 4.150 4.192 4.234 v chargingcurrent() = 0x0bc0 139.9 150.4 160.9 batt charge current-sense voltage i0 v csip - v csin chargingcurrent() = 0x0080 3.08 6.4 9.72 mv v cls = 4.096v 188.6 204.8 221.0 dcin source current-limit sense voltage v cssp - v cssn v cls = 2.048v 91.3 102.4 113.5 mv batt undervoltage charge current-sense voltage v csip - v csin v batt = 1v 3.08 6.4 9.72 mv inductor peak current limit v csip - v csin 250 300 350 mv batt/csip/csin input voltage range 020v total batt input bias current total of i batt , i csip , and i csin ; v batt = 0 to 20v -700 +700 a total batt quiescent current total of i batt , i csip , and i csin ; v batt = 0 to 20v, charge inhibited -100 +100 a total batt standby current total of i batt , i csip , and i csin ; v batt = 0 to 20v, v dcin = 0 -5 +5 a cssp input bias current v cssp = v cssn = v dcin = 0 to 28v -100 540 +1000 a cssn input bias current v cssp = c cssn = v dcin = 0 to 28v -100 35 +100 a cssp/cssn quiescent current v cssp = v cssn = 28v, v dcin = 0 -1 +1 a battery voltage-error amp dc gain from batt to ccv 200 500 v/v cls input bias current v cls = v ref /2 to v ref -1 +0.05 +1 a battery voltage-error amp transconductance from batt to ccv, chargingvoltage() = 0x41a0, v batt = 16.8v 0.111 0.222 0.444 a/mv battery current-error amp transconductance from csip/csin to cci, chargingcurrent() = 0x0bc0, v csip - v csin = 150.4mv 0.5 1 2.0 a/mv input current-error amp transconductance from cssp/cssn to ccs, v cls = 2.048v, v cssp - v cssn = 102.4mv 0.5 1 2.0 a/mv ccv/cci/ccs clamp voltage v ccv = v cci = v ccs = 0.25v to 2v (note 3) 150 300 600 mv max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 4 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0 c to +85 c , unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units dc-to-dc converter specifications minimum off-time t off 1.0 1.25 1.5 s maximum on-time t on 5 1015ms maximum duty cycle 99 99.99 % lx input bias current v dcin = 28v, v batt = v lx = 20v 200 500 a lx input quiescent current v dcin = 0, v batt = v lx = 20v 1 a bst supply current dhi high 6 15 a dlov supply current v dlov = v ldo , dlo low 5 10 a dhi output resistance dhi high or low, v bst - v lx = 4.5v 6 14 ? dlo output resistance dlo high or low, v dlov = 4.5v 6 14 ? thermistor comparator specifications thm input bias current v thm = 4% of v dd to 96% of v dd , v dd = 2.8v to 5.65v -1 +1 a thermistor overrange threshold v dd = 2.8v to 5.65v, v thm falling 89.5 91 92.5 % of v dd thermistor cold threshold v dd = 2.8v to 5.65v, v thm falling 74 75.5 77 % of v dd thermistor hot threshold v dd = 2.8v to 5.65v, v thm falling 22 23.5 25 % of v dd thermistor underrange threshold v dd = 2.8v to 5.65v, v thm falling 6 7.5 9 % of v dd thermistor comparator threshold hysteresis all four comparators, v dd = 2.8v to 5.65v 1 % of v dd smb interface level specifications (v dd = 2.8v to 5.65v) sda/scl input low voltage 0.6 v sda/scl input high voltage 1.4 v sda/scl input hysteresis 220 mv sda/scl input bias current -1 +1 a sda output low sink current v sda = 0.4v 6 ma int output high leakage v i nt = 5.65v 1 a int output low voltage i i nt = 1ma 25 200 mv smb interface timing specifications (v dd = 2.8v to 5.65v, figures 4 and 5) scl high period t high 4s scl low period t low 4.7 s start condition setup time from scl t su:sta 4.7 s start condition hold time from scl t hd:sta 4s sda setup time from scl t su:dat 250 ns sda hold time from scl t hd:dat 0ns advanced chemistry-independent, level 2 battery charger with input current limiting _______________________________________________________________________________________ 5 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0 c to +85 c , unless otherwise noted. typical values are at t a = +25 c.) electrical characteristics (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40 c to +85 c , unless otherwise noted. guaranteed by design.) parameter symbol conditions min typ max units sda output data valid from scl t dv 1s maximum charge period without a chargingvoltage() or charging current() loaded t wdt 140 175 210 s parameter symbol conditions min typ max units general specifications dcin typical operating range v dcin 828v dcin supply current i dcin 8v < v dcin < 28v 6 ma dcin supply current charging inhibited 8v < v dcin < 28v 2 ma dcin rising 7.85 dcin undervoltage threshold when ac_present switches dcin falling 7 v ldo output voltage v ldo 8v < v dcin < 28v, 0 < i ldo < 15ma 5.15 5.65 v v dd input voltage range 8v < v dcin < 28v (note 1) 2.80 5.65 v v dd rising 2.8 v dd undervoltage threshold when the s m b r esp ond s to com m and s v dd falling 2.1 v v dd quiescent current i dd 0 < v dcin < 6v, v dd = 5v, v scl = 5v, v sda = 5v 150 a ref output voltage v ref 0 < i ref < 200a 4.035 4.157 v batt undervoltage threshold when i charge drops to 128ma (note 2) 2.4 2.8 v pds charging source switch turn-off threshold v pds-off v cvs referred to v batt , v cvs falling 50 150 mv pds charging source switch threshold hysteresis v pds-hys v cvs referred to v batt 100 300 mv pds output low voltage, pds below cssp i pds = 0 8 12 v pds turn-on current pds = cssp 100 300 a pds turn-off current v pds = v cssp - 2v, v dcin = 16v 10 ma pdl load switch turn-off threshold v pdl-off v cvs referred to v batt , v cvs rising -150 -50 mv pdl load switch threshold hysteresis v pdl-hys v cvs referred to v batt 100 300 mv pdl turn-off current v cssn - v pdl = 1v 6 ma max1645b max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 6 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40 c to +85 c , unless otherwise noted. guaranteed by design.) parameter symbol conditions min typ max units pdl turn-on resistance pdl to gnd 50 150 k ? cvs input bias current v cvs = 28v 20 a error amplifier specifications chargingvoltage() = 0x41a0 16.532 17.068 chargingvoltage() = 0x3130 12.391 12.793 chargingvoltage() = 0x20d0 8.266 8.534 batt full-charge voltage v0 chargingvoltage() = 0x1060 4.124 4.260 v chargingcurrent() = 0x0bc0 130.4 170.4 batt charge current-sense voltage i0 v csip - v csin chargingcurrent() = 0x0080 0.76 12.04 mv v cls = 4.096v 174.3 235.3 dcin source current-limit sense voltage v cssp - v cssn v cls = 2.048v 82.2 120.2 mv batt undervoltage charge current-sense voltage v batt = 1v, v csip - v csin 110mv inductor peak current limit v csip - v csin 250 350 mv batt/csip/csin input voltage range 020v total batt input bias current total of i batt , i csip , and i csin ; v batt = 0 to 20v -700 +700 a total batt quiescent current total of i batt , i csip , and i csin ; v batt = 0 to 20v, charge inhibited -100 +100 a total batt standby current total of i batt , i csip , and i csin ; v batt = 0 to 20v, v dcin = 0 -5 +5 a cssp/input bias current v cssp = v cssn = v dcin = 0 to 28v -100 +1000 a cssn input bias current v cssp = c cssn = v dcin = 0 to 28v -100 +100 ma cssp/cssn quiescent current v cssp = v cssn = 28v, v dcin = 0 -1 +1 a battery voltage-error amp dc gain from batt to ccv 200 v/v cls input bias current v cls = v ref /2 to v ref -1 +1 a battery voltage-error amp transconductance from batt to ccv, chargingvoltage() = 0x41a0, v batt = 16.8v 0.111 0.444 a/mv battery current-error amp transconductance from csip/csin to cci, chargingcurrent() = 0x0bc0, v csip - v csin = 150.4mv 0.5 2.0 a/mv input current-error amp transconductance from cssp/cssn to ccs, v cls = 2.048v, v cssp - v cssn = 102.4mv 0.5 2.0 a/mv ccv/cci/ccs clamp voltage v ccv = v cci = v ccs = 0.25v to 2v (note 3) 150 600 mv max1645b advanced chemistry-independent, level 2 battery charger with input current limiting _______________________________________________________________________________________ 7 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40 c to +85 c , unless otherwise noted. guaranteed by design.) parameter symbol conditions min typ max units dc-to-dc converter specifications minimum off-time t off 1.0 1.5 s maximum on-time t on 515ms maximum duty cycle 99 % lx input bias current v dcin = 28v, v batt = v lx = 20v 500 a lx input quiescent current v dcin = 0, v batt = v lx = 20v 1 a bst supply current dhi high 15 a dlov supply current v dlov = v ldo , dlo low 10 a dhi output resistance dhi high or low, v bst - v lx = 4.5v 14 ? dlo output resistance dlo high or low, v dlov = 4.5v 14 ? thermistor comparator specifications thm input bias current v thm = 4% of v dd to 96% of v dd , v dd = 2.8v to 5.65v -1 +1 a thermistor overrange threshold v dd = 2.8v to 5.65v, v thm falling 89.5 92.5 % of v dd thermistor cold threshold v dd = 2.8v to 5.65v, v thm falling 74 77 % of v dd thermistor hot threshold v dd = 2.8v to 5.65v, v thm falling 22 25 % of v dd thermistor underrange threshold v dd = 2.8v to 5.65v, v thm falling 6 9 % of v dd smb interface level specifications (v dd = 2.8v to 5.65v) sda/scl input low voltage 0.6 v sda/scl input high voltage 1.4 v sda/scl input bias current -1 +1 a sda output low sink current v sda = 0.4v 6 ma int output high leakage v i nt = 5.65v 1 a int output low voltage i i nt = 1ma 200 mv smb interface timing specifications (v dd = 2.8v to 5.65v, figures 4 and 5) scl high period t high 4s scl low period t low 4.7 s start condition setup time from scl t su:sta 4.7 s start condition hold time from scl t hd:sta 4s sda setup time from scl t su:dat 250 ns sda hold time from scl t hd:dat 0ns 4.090 4.092 4.096 4.094 4.098 4.100 0 100 50 150 200 250 300 reference voltage load regulation max1645b toc05 load current ( a) v ref (v) 5.20 5.30 5.25 5.35 5.50 5.55 5.45 5.40 5.60 0 46810 2 1214161820 ldo load regulation max1645b toc04 load current (ma) v ldo (v) max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 8 _______________________________________________________________________________________ typical operating characteristics (circuit of figure 1, v dcin = 20v, t a = +25 c, unless otherwise noted.) battery removal and reinsertion transient response max1645b toc01 chargingvoltage() = 16000mv chargingcurrent() = 1000ma cci cci battery removed battery inserted ccv ccv cci ccv 16v 15v 1a 0 1.25v v ccv /v cci i batt v batt 0.75v 0.25v 2ms/div load-transient response (step-in load current) max1645b toc02 chargingcurrent() = 3.0a 0 to 2a load step, v batt = 20v i source limit = 2.5a ccs ccs ccs 15.5v 15.0v 2.75v 2.25v 1.75v 0.75v 400 s/div cci cci cci v ccs /v cci v batt 5.20 5.25 5.30 5.35 5.40 5.45 5.50 5.55 5.60 5 1015202530 ldo line regulation max1645b toc03 v dcin (v) v ldo (v) i load = 0 4.080 4.090 4.085 4.100 4.095 4.105 4.110 -40 20 40 -20 0 60 80 100 reference voltage vs. temperature max1645b toc06 temperature ( c) v ref (v) electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40 c to +85 c , unless otherwise noted. guaranteed by design.) note 1: guaranteed by meeting the smb timing specs. note 2: the charger reverts to a trickle-charge mode of i charge = 128ma below this threshold. note 3: voltage difference between ccv and cci or ccs when one of these three pins is held low and the others try to pull high. parameter symbol conditions min typ max units sda output data valid from scl t dv 1s maximum charge period without a chargingvoltage() or charging current() loaded t wdt 140 210 s max1645b advanced chemistry-independent, level 2 battery charger with input current limiting _______________________________________________________________________________________ 9 50 65 60 55 70 75 80 85 90 95 100 0 1000 500 1500 2000 2500 3000 efficiency vs. battery current (voltage-control loop) max1645b toc07 battery current (ma) efficiency (%) a: v dcin = 20v, chargingvoltage() = 16.8v b: v dcin = 16v, chargingvoltage() = 8.4v b a 50 65 60 55 70 75 80 85 90 95 100 0 1000 500 1500 2000 2500 3000 efficiency vs. battery current (current-control loop) max1645b toc08 chargingcurrent() (code) efficiency (%) a: v dcin = 20v, v batt = 16.8v b: v dcin = 16v, v batt = 8.4v a b 10 1.0 0.1 0.01 0.001 output vi characteristics max1645b toc09 load current (ma) drop in batt output voltage (%) 0 1500 2000 500 1000 2500 3000 3500 chargingvoltage() = 16800mv chargingcurrent() = 3008ma -0.3 0 -0.1 -0.2 0.1 0.2 0.3 0 8000 4000 12,000 16,000 20,000 batt voltage error vs. chargingvoltage() code max1645b toc10 chargingvoltage() (code) batt voltage error (%) i batt = 0 measured at available codes -5 -2 -3 -4 -1 0 1 2 3 4 5 0 1000 500 1500 2000 2500 3000 current-setting error vs. chargingcurrent() code max1645b toc11 chargingcurrent() (code) batt current error (%) v batt = 12.6v measured at available codes 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 0 1.0 0.5 1.5 2.0 2.5 source/batt current vs. load current with source current limit max1645b toc12 load current (a) source/batt current (a) i in i batt v cls = 2v r css = 40m ? v batt = 16.8v source current limit = 2.5a chargingcurrent() = 3008ma chargingvoltage() = 18432mv 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 04 2 6 8 101214161820 source/batt current vs. v batt with source current limit max1645b toc13 v batt (v) source/batt current (a) i in i batt i load = 2a v cls = 2v r css = 40m ? chargingvoltage() = 18432mv chargingcurrent() = 3008ma source current limit = 2.5a typical operating characteristics (continued) (circuit of figure 1, v dcin = 20v, t a = +25 c, unless otherwise noted.) max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 10 ______________________________________________________________________________________ pin description pin name function 1 dcin dc supply voltage input 2 ldo 5.4v linear-regulator voltage output. bypass with a 1f capacitor to gnd. 3 cls source current-limit input 4 ref 4.096v reference voltage output 5 ccs charging source compensation capacitor connection. connect a 0.01f capacitor from ccs to gnd. 6 cci battery current-loop compensation capacitor connection. connect a 0.01f capacitor from cci to gnd. 7 ccv battery voltage-loop compensation capacitor connection. connect a 10k ? resistor in series with a 0.01f capacitor to gnd. 8 gnd ground 9 batt battery voltage output 10 dac dac voltage output 11 v dd logic circuitry supply voltage input (2.8v to 5.65v) 12 thm thermistor voltage input 13 scl smb clock input 14 sda smb data input/output. open-drain output. needs external pullup. 15 int interrupt output. open-drain output. needs external pullup. 16 pdl pmos load switch driver output 17 csin battery current-sense negative input 18 csip battery current-sense positive input 19 pgnd power ground 20 dlo low-side nmos driver output 21 dlov low-side nmos driver supply voltage. bypass with 0.1f capacitor to gnd. 22 lx inductor voltage sense input 23 dhi high-side nmos driver output 24 bst high-side driver bootstrap voltage input. bypass with 0.1f capacitor to lx. 25 cssn charging source current-sense negative input 26 cssp charging source current-sense positive input 27 pds charging source pmos switch driver output 28 cvs charging source voltage input max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 11 detailed description the max1645b consists of current-sense amplifiers, an smbus interface, transconductance amplifiers, reference circuitry, and a dc-dc converter (figure 2). the dc-dc converter generates the control signals for the external mosfets to maintain the voltage and the current set by the smbus interface. the max1645b features a voltage- regulation loop and two current-regulation loops. the loops operate independently of each other. the voltage- regulation loop monitors batt to ensure that its voltage never exceeds the voltage set point (v0). the battery cur- rent-regulation loop monitors current delivered to batt to ensure that it never exceeds the current-limit set point (i0). the battery current-regulation loop is in control as long as batt voltage is below v0. when batt voltage reaches v0, the current loop no longer regulates. a third loop reduces the battery-charging current when the sum of the system (the main load) and the battery charger input current exceeds the charging source current limit. setting output voltage the max1645b voltage dac has a 16mv lsb and an 18.432v full scale. the smbus specification allows for a 16-bit chargingvoltage() command that translates to a 1mv lsb and a 65.535v full-scale voltage; therefore, the chargingvoltage() value corresponds to the output voltage in millivolts. the max1645b ignores the first 4 lsbs and uses the next 11 lsbs to control the voltage dac. all codes greater than or equal to 0x4800 (18432mv) result in a voltage overrange, limiting the charger voltage to 18.432v. all codes below 0x0400 (1024mv) terminate charging. setting the charge current the max1645b charge-current dac has a 3.2mv to 150.4mv range. the smbus specification allows for a 16-bit chargingcurrent() command that translates to a 0.05mv lsb and a 3.376v full-scale current-sense volt- age. the max1645b drops the first 6 lsbs and uses the remaining 6 msbs to control the charge-current dac. all codes above 0x0bc0 result in an overrange condition, limiting the charge current-sense voltage to 150.4mv. all codes below 0x0080 turn off the charging current. therefore, the charging current (i charge ) is determined by: i charge = v daci / r csi where v daci is the current-sense voltage set by chargingcurrent(), and r csi is the battery current- sense resistor (r2 in figure 1). when using a 50m ? current-sense resistor, the chargingcurrent() value cor- responds directly to the charging current in milliamps (0x0400 = 1024ma = 52.2mv/50m ? ). input current limiting the max1645b limits the current drawn by the charger when the load current becomes high. the device limits the charging current so the ac adapter voltage is not loaded down. an internal amplifier, css, compares the voltage between cssp and cssn to the voltage at cls/20. v cls is set by a resistor-divider between ref and gnd. the input source current is the sum of the device cur- rent, the charge input current, and the load current. the device current is minimal (6ma max) in comparison to the charge and load currents. the charger input cur- rent is generated by the dc-dc converter; therefore, the actual source current required is determined as follows: i source = i load + [(i charge ? v batt) / (v in ? )] where is the efficiency of the dc-dc converter (typi- cally 85% to 95%). v cls determines the threshold voltage of the css com- parator. r3 and r4 (figure 1) set the voltage at cls. sense resistor r1 sets the maximum allowable source current. calculate the maximum current as follows: i max = v cls / (20 ? r 1 ) (limit v cssp - v cssn to between 102.4mv and 204.8mv.) the configuration in figure 1 provides an input current limit of: i max = (2.048v / 20) / 0.04 ? = 2.56a ldo regulator an integrated ldo regulator provides a +5.4v supply derived from dcin, which can deliver up to 15ma of current. the ldo sets the gate-drive level of the nmos switches in the dc-dc converter. the drivers are actu- ally powered by dlov and bst, which must be con- nected to ldo through a lowpass filter and a diode as shown in figure 1. also see the mosfet drivers sec- tion. the ldo also supplies the 4.096v reference and most of the control circuitry. bypass ldo with a 1f capacitor. v dd supply this input provides power to the smbus interface and the thermistor comparators. typically connect v dd to ldo or, to keep the smbus interface of the max1645b active while the supply to dcin is removed, connect an external supply to v dd . max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 12 ______________________________________________________________________________________ load adapter in max1645b cvs dcin ref cls gnd dac ccv cci ccs pds cssp cssn ldo dhi lx dlov bst pgnd dlo csip csin pdl batt thm v dd scl sda int battery host d4 1n4148 c5 1 f r13 1k ? c23 0.1 f c7 1 f r3 100k ? r4 100k ? c8 0.1 f c9 0.01 f p1 fds6675 d1 1n5821 c2 22 f c1 22 f r1 0.04 ? c20, 1 f c19, 1 f r14 4.7 ? r15 4.7 ? c6 1 f d3 cmpsh3 r12 33 ? c16 0.22 f c14 0.1 f n1 fds6680 n2 fds6612a l1 22 h d2 1n5821 r9 10k ? c12 1 f r8 10k ? r6 10k ? r10 10k ? c13 1.5nf r7 10k ? r2 0.05 ? p2 fds6675 c4 22 f c3 22 f c18 0.1 f r16 1 ? r11 1 ? c24 0.1 f r5 10k ? r17 10k ? r18 10k ? c11 1nf c10 1nf figure 1. typical application circuit max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 13 lvc gms pds vl ref pdl css cssp cssn cls csip csin v dd scl sda thm csi batt gmi gmv smb daci dacv temp dc-dc dhi bst dhi lx dlov dlo pgnd ccs cci ccv cvs batt pds pdl dcin ldo ref gnd dac dlo max1645b int figure 2. functional diagram max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 14 ______________________________________________________________________________________ operating conditions the max1645b changes its operation depending on the voltages at dcin, batt, v dd, and thm. several important operating states follow: ac present. when dcin is >7.5v, the battery is con- sidered to be in an ac present state. in this condi- tion, both the ldo and ref function properly and battery charging is allowed. when ac is present, the ac_present bit (bit 15) in the chargerstatus() reg- ister is set to 1. power fail. when dcin is max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 16 ______________________________________________________________________________________ start condition most significant address bit (a6) clocked into slave a5 clocked into slave a4 clocked into slave a3 clocked into slave t high t low t hd:sta t su:sta t su:dat t hd:dat scl sda t su:dat t hd:dat t dv slave pulling sda low t dv most significant bit of data clocked into master acknowledge bit clocked into master r/w bit clocked into slave scl sda figure 4. smbus serial interface timing?ddress figure 5. smbus serial interface timing?cknowledgment max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 17 table 1. chargerspecinfo()* *command: 0x11 bit name description 0 charger_spec returns a 1 for version 1.0 1 charger_spec returns a zero for version 1.0 2 charger_spec returns a zero for version 1.0 3 charger_spec returns a 1 for version 1.0 4 selector_support returns a zero, indicating no smart battery selector functionality 5 reserved returns a zero 6 reserved returns a zero 7 reserved returns a zero 8 reserved returns a zero 9 reserved returns a zero 10 reserved returns a zero 11 reserved returns a zero 12 reserved returns a zero 13 reserved returns a zero 14 reserved returns a zero 15 reserved returns a zero max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 18 ______________________________________________________________________________________ table 2. chargermode()* *command: 0x12 * state at chip initial power-on (i.e., v dd from 0 to +3.3v). bit name function 0 inhibit_charge 0* = allow normal operation; clear the chg_inhibited flip-flop. 1 = turn off the charger; set the chg_inhibited flip-flop. the chg_inhibited flip-flop is not affected by any other commands. 1 enable_polling not implemented. 2 por_reset 0 = no change. 1 = change the chargingvoltage() to 0xffff and the chargingcurrent() to 0x00c0; clear the thermistor_hot and alarm_inhibited flip-flops. 3 reset_to_zero not implemented. 4 ac_present_mask 0* = interrupt on either edge of the ac_present status bit. 1 = do not interrupt because of an ac_present bit change. 5 battery_present_ mask 0* = interrupt on either edge of the battery_present status bit. 1 = do not interrupt because of a battery_present bit change. 6 power_fail_mask 0* = interrupt on either edge of the power_fail status bit. 1 = do not interrupt because of a power_fail bit change. 7 not implemented. 8 not implemented. 9 not implemented. 10 hot_stop 0 = the thermistor_hot status bit does not turn off the charger. 1* = the thermistor_hot status bit does turn off the charger. thermistor_hot is reset by either por_reset or battery_present = 0 status bit. 11 not implemented. 12 not implemented. 13 not implemented. 14 not implemented. 15 not implemented. max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 19 table 3. chargerstatus()* *command: 0x13 ** state at chip initial power-on. bit name function 0 charge_inhibited 0** = ready to charge smart battery. 1 = charger is inhibited, i(chg) = 0ma. this status bit returns the value of the chg_inhibited flip-flop. 1 master_mode always returns zero. 2 voltage_not_reg function disabled. always returns zero. 3 current_not_reg function disabled. always returns zero. 4 level_2 always returns a 1. 5 level_3 always returns a zero. 6 current_or 0** = the chargingcurrent() value is valid for the max1645b. 1 = the chargingcurrent() value exceeds the max1645b output range, i.e., programmed chargingcurrent() exceeds 3008ma. 7 voltage_or 0 = the chargingvoltage() value is valid for the max1645b. 1** = the chargingvoltage() value exceeds the max1645b output range, i.e., programmed chargingvoltage() exceeds 1843mv. 8 thermistor_or 0 = thm is <91% of the reference voltage. 1 = thm is >91% of the reference voltage. 9 thermistor_cold 0 = thm is <75.5% of the reference voltage. 1 = thm is >75.5% of the reference voltage. 10 thermistor_hot 0 = thm has not dropped to <23.5% of the reference voltage. 1 = thm has dropped to <23.5% of the reference voltage. thermistor_hot flip-flop cleared by battery_present = 0 or writing a 1 into the por_reset bit in the chargermode() command. 11 thermistor_ur 0 = thm is >7.5% of the reference voltage. 1 = thm is <7.5% of the reference voltage. 12 alarm_inhibited returns the state of the alarm_inhibited flip-flop. this flip-flop is set by either a watchdog timeout or by writing an alarmwarning() command with bits 11, 12, 13, 14, or 15 set. this flip-flop is cleared by battery_present = 0, writing a 1 into the por_reset bit in the chargermode() command, or by receiving successive chargingvoltage() and chargingcurrent() commands. por: 0. 13 power_fail 0 = the charging source voltage cvs is above the batt voltage. 1 = the charging source voltage cvs is below the batt voltage. 14 battery_present 0 = no battery is present (based on thm input). 1 = battery is present (based on thm input). 15 ac_present 0 = dcin is below the 7.5v undervoltage threshold. 1 = dcin is above the 7.5v undervoltage threshold. max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 20 ______________________________________________________________________________________ table 4. chargingcurrent()* *command: 0x14 bit name function 0 not used. normally a 0.05mv (1ma x 50m ? ) weight. 1 not used. normally a 0.1mv (2ma x 50m ? ) weight. 2 not used. normally a 0.2mv (4ma x 50m ? ) weight. 3 not used. normally a 0.4mv (8ma x 50m ? ) weight. 4 not used. normally a 0.8mv (16ma x 50m ? ) weight. 5 not used. normally a 1.6mv (32ma x 50m ? ) weight. 6 charge current, daci 0 0 = adds 0mv of charge current-sense voltage. 1 = adds 3.2mv (64ma x 50m ? ) charge current-sense voltage. 6.4mv (min) (128ma x 50ma) sense voltage. 7 charge current, daci 1 0 = adds 0mv of charge current-sense voltage. 1 = adds 6.4mv (128ma x 50m ? ) charge current-sense voltage. 8 charge current, daci 2 0 = adds 0mv of charge current-sense voltage. 1 = adds 12.8mv (256ma x 50m ? ) charge current-sense voltage. 9 charge current, daci 3 0 = adds 0mv of charge current-sense voltage. 1 = adds 25.6mv (512ma x 50m ? ) charge current-sense voltage. 10 charge current, daci 4 0 = adds 0mv of charge current-sense voltage. 1 = adds 51.2mv (1024ma x 50m ? ) charge current-sense voltage. 11 charge current, daci 5 0 = adds 0mv of charge current-sense voltage. 1 = adds 102.4mv (2048ma x 50m ? ) charge current-sense voltage. 150.4mv (max) (3008ma x 50ma) sense voltage. 12 15 0 = adds 0mv of charge current-sense voltage. 1 = sets charge current-sense voltage into overrange. 150.4mv (max) (3008ma x 50ma) sense voltage. chargingcurrent() (por: 0x0080) the chargingcurrent() command uses the write-word protocol (figure 3a). the command code for chargingcurrent() is 0x14 (0b00010100). the 16-bit binary number formed by d15 d0 represents the cur- rent-limit set point (i0) in milliamps. however, since the max1645b has 64ma resolution in setting i0, the d0 d5 bits are ignored as shown in table 4. figure 6 shows the mapping between i0 (the current-regulation-loop set point) and the chargingcurrent() code. all codes above 0b00 1011 1100 0000 (3008ma) result in a current over- range, limiting the charger current to 3.008a. all codes below 0b0000 0000 1000 0000 (128ma) turn the charg- ing current off. a 50m ? sense resistor (r2 in figure 1) is required to achieve the correct code/current scaling. the power-on reset value for the chargingcurrent() reg- ister is 0x0080; thus, the first time a max1645b is pow- ered on, the batt current regulates to 128ma. any time 6.4 0x0080 0x0800 0xffff 0x0bc0 0x0400 51.2 150.4 average (csip - csin) voltage in current regulation (mv) 102.4 figure 6. average voltage between csip and csin vs. charging current() code the battery is removed, the chargingcurrent() register returns to its power-on reset state. chargingvoltage() (por: 0x4800) the chargingvoltage() command uses the write-word protocol (figure 3a). the command code for chargingvoltage() is 0x15 (0b00010101). the 16-bit binary number formed by d15 d0 represents the volt- age set point (v0) in millivolts; however, since the max1645b has 16mv resolution in setting v0, the d0, d1, d2, and d3 bits are ignored as shown in table 5. the chargingvoltage() command is used to set the bat- tery charging voltage compliance from 1.024v to 18.432v. all codes greater than or equal to 0b0100 1000 0000 0000 (18432mv) result in a voltage over- range, limiting the charger voltage to 18.432v. all codes below 0b0000 0100 0000 0000 (1024mv) terminate charge. figure 7 shows the mapping between v0 max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 21 table 5. chargingvoltage()* *command: 0x15 pin bit name function 0 not used. normally a 1mv weight. 1 not used. normally a 2mv weight. 2 not used. normally a 4mv weight. 3 not used. normally an 8mv weight. 4 charge voltage, dacv 0 0 = adds 0mv of charger-voltage compliance. 1 = adds 16mv of charger-voltage compliance, 1.024v (min). 5 charge voltage, dacv 1 0 = adds 0mv of charger-voltage compliance. 1 = adds 32mv of charger-voltage compliance, 1.024v (min). 6 charge voltage, dacv 2 0 = adds 0mv of charger-voltage compliance. 1 = adds 64mv of charger-voltage compliance, 1.024v (min). 7 charge voltage, dacv 3 0 = adds 0mv of charger-voltage compliance. 1 = adds 128mv of charger-voltage compliance, 1.024v (min). 8 charge voltage, dacv 4 0 = adds 0mv of charger-voltage compliance. 1 = adds 256mv of charger-voltage compliance, 1.024v (min). 9 charge voltage, dacv 5 0 = adds 0mv of charger-voltage compliance. 1 = adds 512mv of charger-voltage compliance, 1.024v (min). 10 charge voltage, dacv 6 0 = adds 0ma of charger-voltage compliance. 1 = adds 1024mv of charger-voltage compliance. 11 charge voltage, dacv 7 0 = adds 0mv of charger-voltage compliance. 1 = adds 2048mv of charger-voltage compliance. 12 charge voltage, dacv 8 0 = adds 0mv of charger-voltage compliance. 1 = adds 4096mv of charger-voltage compliance. 13 charge voltage, dacv 9 0 = adds 0mv of charger-voltage compliance. 1 = adds 8192mv of charger-voltage compliance. 14 charge voltage, dacv 10 0 = adds 0mv of charger-voltage compliance. 1 = adds 16384mv of charger-voltage compliance, 18432mv (max). 15 charge voltage, overrange 0 = adds 0mv of charger-voltage compliance. 1 = sets charger compliance into overrange, 18432mv. max1645b (the voltage-regulation-loop set point) and the chargingvoltage() code. the power-on reset value for the chargingvoltage() reg- ister is 0x4880; thus, the first time a max1645b is pow- ered on, the batt voltage regulates to 18.432v. any time the battery is removed, the chargingvoltage() reg- ister returns to its power-on reset state. the voltage at dac corresponds to the set compliance voltage divided by 4.5. alarmwarning() (por: not alarm) the alarmwarning() command uses the write-word protocol (figure 3a). the command code for alarmwarning() is 0x16 (0b00010110). alarmwarning() sets the alarm_inhibited status bit in the max1645b if d15, d14, d13, d12, or d11 of the write-word protocol data equals 1. table 6 summarizes the alarm-warning() command s function. the alarm_inhibited status bit remains set until the battery is removed, a chargermode() command is written with the por_reset bit set, or new chargingcurrent() and chargingvoltage() values are written. as long as alarm_inhibited = 1, the max1645b switching regu- lators remain off. advanced chemistry-independent, level 2 battery charger with input current limiting 22 ______________________________________________________________________________________ 16.800v 18.432v v ref = 4.096v vdcin > 20v 0 1.024v 0 0x0400 0x20dx 0x41a0 0x313x 0x4800 0x106x 4.192v 12.592v chargingvoltage() d15?0 data voltage set point (v0) 8.400v 0xffff figure 7. chargingvoltage() code to voltage mapping max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 23 table 6. alarmwarning()* *command: 0x16 bit bit name function 0 error code not used 1 error code not used 2 error code not used 3 error code not used 4 fully_discharged not used 5 fully_charged not used 6 discharging not used 7 initializing not used 8 remaining_time_ alarm not used 9 remaining_capacity_ alarm not used 10 reserved not used 11 terminate_ discharge_alarm 0 = charge normally 1 = terminate charging 12 over_temp_alarm 0 = charge normally 1 = terminate charging 13 other_alarm 0 = charge normally 1 = terminate charging 14 terminate_charge_ alarm 0 = charge normally 1 = terminate charging 15 over_charge_alarm 0 = charge normally 1 = terminate charging max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 24 ______________________________________________________________________________________ interrupts and alert response address the max1645b requests an interrupt by pulling the int pin low. an interrupt is normally requested when there is a change in the state of the chargerstatus() bits power_fail (bit 13), battery_present (bit 14), or ac_present (bit 15). therefore, the int pin pulls low whenever the ac adapter is connected or disconnect- ed, the battery is inserted or removed, or the charger goes in or out of dropout. the interrupts from each of the chargerstatus() bits can be masked by an associat- ed chargermode() bit power_fail_mask (bit 6), bat- tery_present_mask (bit 5), or ac_present_mask (bit 4). all interrupts are cleared by sending any command to the max1645b, or by sending a command to the alertresponse() address, 0x19, using a modified receive-byte protocol. in this protocol, all devices that set an interrupt try to respond by transmitting their address, and the device with the highest priority, or most leading zeros, are recognized and cleared. the process repeats until all devices requesting interrupts are addressed and cleared. the max1645b responds to the alertresponse() address with 0x13, which is its address and a trailing 1. charger timeout the max1645b includes a timer that terminates charge if the charger has not received a chargingvoltage() or chargingcurrent() command in 175s. during charging, the timer is reset each time a chargingvoltage() or chargingcurrent() command is received; this ensures that the charging cycle is not terminated. if timeout occurs, charging terminates and both chargingvoltage() and chargingcurrent() commands are required to restart charging. a power-on reset also restarts charging at 128ma. dc-to-dc converter the max1645b employs a buck regulator with a boot- strapped nmos high-side switch and a low-side nmos synchronous rectifier. dc-to-dc controller the control scheme is a constant off-time, variable-fre- quency, cycle-by-cycle current mode. the off-time is constant for a given batt voltage; it varies with v batt to keep the ripple current constant. during low-dropout operation, a maximum on-time of 10ms allows the con- troller to achieve >99% duty cycle with continuous con- duction. figure 8 shows the controller functional diagram. mosfet drivers the low-side driver output dlo swings from 0v to dlov. dlov is usually connected through a filter to ldo. the high-side driver output dhi is bootstrapped off lx and swings from v lx to v bst . when the low-side driver turns on, bst rises to one diode voltage below dlov. filter dlov with an rc circuit whose cutoff frequency is about 50khz. the configuration in figure 1 intro- duces a cutoff frequency of around 48khz: f = 1 / 2 rc = 1 / (2 ? ? 33 ? ? 0.1f) = 48khz thermistor comparators four thermistor comparators evaluate the voltage at the thm input to determine the battery temperature. this input is meant to be used with the internal thermistor connected to ground inside the battery pack. connect the output of the battery thermistor to thm. connect a resistor from thm to v dd . the resistor-divider sets the voltage at thm. when the charger is not powered up, the battery temperature can still be determined if v dd is powered from an external voltage source. thermistor bits figure 9 shows the expected electrical behavior of a 103etb-type thermistor (nominally 10k ? at +25 c 5% or better) to be used with the max1645b: thermistor_or bit is set when the thermistor value is >100k ? . this indicates that the thermistor is open or a battery is not present. the charger is set to por, and the battery_present bit is cleared. thermistor_cold bit is set when the thermistor value is >30k ? . the thermistor indicates a cold bat- tery. this bit does not affect the charge. thermistor_hot bit is set when the thermistor value is <3k ? . this is a latched bit and is cleared by removing the battery or sending a por with the chargermode() command. the max1645b charger is stopped unless the hot_stop bit is cleared in the chargermode() command or the res_ur bit is set. see table 7. thermistor_ur bit is set when the thermistor value is <500 ? (i.e., thm is grounded). multiple bits can be set depending on the value of the thermistor (e.g., a thermistor that is 450 ? causes both the thermistor_hot and the thermistor_ur bits to be set). the thermistor can be replaced by fixed- value resistors in battery packs that do not require the thermistor as a secondary fail-safe indicator. in this case, it is the responsibility of the battery pack to manip- ulate the resistance to obtain correct charger behavior. max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 25 figure 8. dc-to-dc converter functional diagram imax reset 3.0v 0.25v 0.1v * optional 10ms lvc control on * * ccv cci ccs gms gmi gmv dacv daci cls dlo dhi csi 1 s bst s rq ccmp zcmp imin chg rq s css cssp adapter in cssn bst dhi lx r1 ldo c bst l1 r2 dlo csip csin c out batt battery max1645b r fc 70k ? r fi 20k ? q max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 26 ______________________________________________________________________________________ load and source switch drivers the max1645b can drive two p-channel mosfets to eliminate voltage drops across the schottky diodes, which are normally used to switch the load current from the battery to the main dc source: the source switch p1 is controlled by pds. this p- channel mosfet is turned on when cvs rises to 300mv above batt and turns off when cvs falls to 100mv above batt. the same signal that controls the pds also sets the power_fail bit in the charger status() register. see operating conditions . load switch p2 is controlled by pdl. this p-channel mosfet is turned off when the cvs rises to 100mv below batt and turns on when cvs falls to 300mv below batt. dropout operation the max1645b has a 99.99% duty-cycle capability with a 10ms maximum on-time and 1s off-time. this allows the charger to achieve dropout performance lim- ited only by resistive losses in the dc-dc converter components (p1, r1, n1, r2; see figure 1). the actual dropout voltage is limited to 300mv between cvs and batt by the power-fail comparator (see operating conditions ). applications information smart battery charging system/background information a smart battery charging system, at a minimum, con- sists of a smart battery and smart battery charger com- patible with the smart battery system specifications using the smbus. a system can use one or more smart batteries. figure 10 shows a single-battery system. this configuration is typically found in notebook computers, video cameras, cellular phones, or other portable electronic equipment. another configuration uses two or more smart batteries (figure 11). the smart battery selector is used either to connect batteries to the smart battery charger or the system, or to disconnect them, as appropriate. for each battery, three connections must be made: power (the battery s positive and negative terminals), the smbus (clock and data), and the safety signal (resis- tance, typically temperature dependent). additionally, the system host must be able to query any battery so it can display the state of all batteries present in the system. figure 11 shows a two-battery system where battery 2 is being charged while battery 1 is powering the system. this configuration can be used to condition battery 1, allowing it to be fully discharged prior to recharge. 1000 100 10 resistance (k ? ) 1 0.1 -40 -50 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 temperature ( c) figure 9. typical thermistor characteristics table 7. thermistor bit settings * see battery present in the operating conditions section for more information. thermistor status bit description wake-up charge controlled charge res_ur and res_hot underrange allowed for timeout period allowed res_hot hot not allowed not allowed (none) normal allowed for timeout period allowed res_cold cold allowed for timeout period allowed res_or and res_cold overrange float charge* not allowed max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 27 smart battery charger types two types of smart battery chargers are defined: level 2 and level 3. all smart battery chargers communicate with the smart battery using the smbus; the two types differ in their smbus communication mode and whether they modify the charging algorithm of the smart battery (table 8). level 3 smart battery chargers are supersets of level 2 chargers and, as such, support all level 2 charger commands. level 2 smart battery charger the level 2 or smart battery-controlled smart battery charger interprets the smart battery s critical warning messages and operates as an smbus slave device to respond to the smart battery s chargingvoltage() and chargingcurrent() messages. the charger is obliged to adjust its output characteristics in direct response to the chargingvoltage() and chargingcurrent() mes- sages it receives from the battery. in level 2 charging, the smart battery is completely responsible for initiating the communication and providing the charging algo- rithm to the charger. the smart battery is in the best position to tell the smart battery charger how it needs to be charged. the charg- ing algorithm in the battery may request a static charge condition or may choose to periodically adjust the smart battery charger s output to meet its present needs. a level 2 smart battery charger is truly chem- istry independent and, since it is defined as an smbus slave device only, the smart battery charger is relatively inexpensive and easy to implement. selecting external components table 9 lists the suppliers contacts; table 10 lists the recommended components and refers to the circuit of figure 1. the following sections describe how to select these components. mosfets and schottky diodes schottky diode d1 provides power to the load when the ac adapter is inserted. choose a 3a schottky diode or higher. this diode may not be necessary if p1 is used. the p-channel mosfet p1 turns on when v cvs > v batt . this eliminates the voltage drop and power con- system power control ac-dc converter (unregulated) ac system power supply dc (unregulated) / v battery safety signal v battery dc (unregulated) v cc +12v, -12v system host (smbus host) smart battery critical events critical events charging voltage/current requests battery data/status requests smart battery charger smbus max1645b figure 10. typical single smart battery system max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 28 ______________________________________________________________________________________ sumption of the schottky diode. to minimize power loss, select a mosfet with an r ds(on) of 50m ? or less. this mosfet must be able to deliver the maximum current as set by r1. d1 and p1 provide protection from reversed voltage at the adapter input. n-channel mosfets n1 and n2 are the switching devices for the buck controller. high-side switch n1 should have a current rating of at least 6a and have an r ds(on) of 50m ? or less. the driver for n1 is powered by bst; its current should be less than 10ma. select a mosfet with a low total gate charge and determine the required drive current by i gate = q gate ? f (where f is the dc-to-dc converter maximum switching frequency of 400khz). the low-side switch n2 should also have a current rating of at least 3a, have an r ds(on) of 100m ? or less, and a total gate charge less than 10nc. n2 is used to provide the starting charge to the bst capacitor c14. during nor- mal operation, the current is carried by schottky diode d2. choose a 3a or higher schottky diode. figure 11. typical system using multiple smart batteries ac-dc converter (unregulated) ac dc (unregulated) / v battery note: sb 1 powering system sb 2 charging v cc +12v, -12v system host (smbus host) smart battery selector smbus smbus smbus safety signal v charge v batt safety signal v batt safety signal smart battery 1 smart battery 2 critical events battery data/status requests smart battery charger smbus max1645b system power supply table 8. smart battery charger type by smbus mode and charge algorithm source note: level 1 smart battery chargers were defined in the ver- sion 0.95a specification. while they can correctly interpret smart battery end-of-charge messages, minimizing over- charge, they do not provide truly chemistry-independent charging. they are no longer defined by the smart battery charger specification and are explicitly not compliant with this and subsequent smart battery charger specifications. charge algorithm source smbus mode battery modified from battery slave only level 2 level 3 slave/master level 3 level 3 max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 29 d3 is a signal-level diode, such as the 1n4148. this diode provides the supply current to the high-side mosfet driver. the p-channel mosfet p2 delivers the current to the load when the ac adapter is removed. select a mosfet with an r ds(on) of 50m ? or less to minimize power loss and voltage drop. inductor selection inductor l1 provides power to the battery while it is being charged. it must have a saturation current of at least 3a plus one-half of the current ripple ( ? i l ): i sat = 3a + 1 / 2 ? i l the controller determines the constant off-time period, which is dependent on batt voltage. this makes the ripple current independent of input and battery voltage and should be kept to less than 1a. calculate the ? i l with the following equation: ? i l = 21vs / l higher inductor values decrease the ripple current. smaller inductor values require higher saturation cur- rent capabilities and degrade efficiency. typically, a 22h inductor is ideal for all operating conditions. other components ccv, cci, and ccs are the compensation points for the three regulation loops. bypass ccv with a 10k ? resistor in series with a 0.01f capacitor to gnd. bypass cci and ccs with 0.01f capacitors to gnd. r7 and r13 serve as protection resistors to thm and cvs, respec- tively. to achieve acceptable accuracy, r6 should be 10k ? and 1% to match the internal battery thermistor. current-sense input filtering in normal circuit operation with typical components, the current-sense signals can have high-frequency tran- sients that exceed 0.5v due to large current changes and parasitic component inductance. to achieve prop- er battery and input current compliance, the current- sense input signals should be filtered to remove large common-mode transients. the input current-limit sens- ing circuitry is the most sensitive case due to large cur- rent steps in the input filter capacitors (c1 and c2) in figure 1. use 1f ceramic capacitors from cssp and cssn to gnd. smaller 0.1f ceramic capacitors can be used on the csip and csin inputs to gnd since the current into the battery is continuous. place these capacitors next to the single-point ground directly under the max1645b. layout and bypassing bypass dcin with a 1f to gnd (figure 1). d4 protects the device when the dc power source input is reversed. a signal diode for d4 is adequate as dcin only powers the ldo and the internal reference. bypass ldo, bst, dlov, and other pins as shown in figure 1. good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions, preferably a pencil sketch showing the placement of power-switching components and high-current routing. a ground plane is essential for optimum performance. in most applications, the circuit is located on a multilay- er board, and full use of the four or more copper layers is recommended. use the top layer for high-current connections, the bottom layer for quiet connections (ref, ccv, cci, ccs, dac, dcin, v dd , and gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: minimize current-sense resistor trace lengths and ensure accurate current sensing with kelvin con- nections. table 9. component suppliers component manufacturer part sumida cdrh127 series coilcraft d03316p series inductor coiltronics up2 series internal rectifier irf7309 fairchild fds series mosfet vishay-siliconix si4435/6 dale wsl series sense resistor irc lr2010-01 series avx tps series, taj series capacitor sprague 595d series motorola 1n5817 1n5822 nihon nsq03a04 diode central semiconductor cmsh series max1645b advanced chemistry-independent, level 2 battery charger with input current limiting 30 ______________________________________________________________________________________ table 10. component selection designation description c1, c2 input capacitors 22f, 35v low-esr tantalum capacitors avx tpse226m035r0300 c3, c4 output capacitors 22f, 25v low-esr tantalum capacitors avx tpsd226m025r0200 c5, c19, c20 1f, >30v ceramic capacitors c6, c7, c12 1f ceramic capacitors c8, c14, c16 0.1f ceramic capacitors c9 compensation capacitor 0.01f ceramic capacitor c10, c11 compensation capacitors 1nf ceramic capacitors c13 1500pf ceramic capacitor c18, c24 0.1f, >20v ceramic capacitors c23 0.1f, >30v ceramic capacitor d1, d2 40v, 2a schottky diodes central semiconductor cmsh2-40 d3, d4 small-signal diodes central semiconductor cmpsh-3 l1 22h, 3.6a buck inductor sumida cdrh127-220 n1 high-side mosfet 30v, 11.5a, high-side n-channel mosfet (8-pin so) fairchild fds6680 30v, 8.4a, low-side n-channel mosfet n2 low-side mosfet fairchild fds6612a or 30v, signal-level n-channel mosfet 2n7002 p1, p2 30v, 11a p-channel mosfets load and source switches fairchild fds6675 r1 40m ? 1%, 0.5w battery current-sense resistor dale wsl-2010/40m ? /1% r2 50m ? 1%, 0.5w source current-sense resistor dale wsl-2010/50m ? /1% r3, r4 r3 + r4 >100k ? input current-limit setting resistors r5, r7 r10, r17, r18 10k ? 5% resistors r6 10k ? 1% temperature sensor network resistor r11, r16 1 ? 5% resistors r12 33 ? 5% resistor r13 1k ? 5% resistor r14, r15 4.7 ? 5% resistors note: see figure 1 for circuit configuration. max1645b advanced chemistry-independent, level 2 battery charger with input current limiting ______________________________________________________________________________________ 31 minimize ground trace lengths in the high-current paths. minimize other trace lengths in the high-current paths: use >5mm-wide traces. connect c1 and c2 to high-side mosfet (10mm (max) length). connect rectifier diode cathode to low-side mosfet (5mm (max) length). lx node (mosfets, rectifier cathode, inductor: 15mm (max) length). ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top- layer copper so they do not go through vias. the resulting top-layer subground plane is con- nected to the normal inner-layer ground plane at the output ground terminals, which ensures that the ic s analog ground is sensing at the supply s output terminals without interference from ir drops and ground noise. other high- current paths should also be minimized, but focusing primarily on short ground and current- sense connections eliminates about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching nodes (lx nodes) away from sensitive ana- log components (current-sense traces and ref capacitor). important: the ic must be no further than 10mm from the current-sense resistors. keep the gate drive traces (dhi, dlo, and bst) shorter than 20mm and route them away from the current-sense lines and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. place the current-sense input filter capacitors under the part, connected directly to the gnd pin. 3) use a single-point star ground placed directly below the part. connect the input ground trace, power ground (subground plane), and normal ground to this node. chip information transistor count: 6996 max1645b advanced chemistry-independent, level 2 battery charger with input current limiting maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. load adapter in max1645b cvs dcin ref cls gnd dac ccv cci ccs pds cssp cssn ldo dhi lx dlov bst pgnd dlo csip csin pdl batt thm v dd scl sda int battery host typical operating circuit |
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